1. Field of the Invention
The present invention relates to the field of transconductance amplifiers and transconductance control.
2. Prior Art
Transconductance amplifiers are the active elements in an important class of continuous-time filters. Desirable features of a transconductance amplifier are a high input resistance, high output resistance, a linear I-V transfer characteristic, and a means of post-fabrication transconductance (g.sub.m) adjustment. For high-frequency applications, it is also desirable that the parasitic poles of the transconductance amplifier occur at frequencies much higher than the critical frequencies of the system.
FIG. 1 shows a prior art bipolar transconductance amplifier based on the Gilbert multiplier. The g.sub.m of this transconductance amplifier may be expressed as ##EQU1##
where g.sub.md is the transconductance of the input differential amplifier formed by Q1, Q2, RE and IEE, and I.sub.2 /I.sub.1 is the gain of the current multiplier formed by Q3, Q4, Q5, Q6 and 2I.sub.2. The current I1 represents the DC emitter current in each of transistors Q3 and Q4; neglecting the effect of the finite beta of Q1, Q2, Q5 and Q6, I1 is seen to be equal to IEE. The current I2 represents the DC emitter current in each of transistors Q5 and Q6, the sum being 2I.sub.2.
Note from (1) that g.sub.m adjustment can be achieved by varying either I.sub.1 (IEE) or I.sub.2 ; however, adjustment of IEE may also adversely affect the linear input range of the input differential amplifier. An additional means of g.sub.m adjustment can be gained by injecting a control current as in the prior art transconductance amplifier of FIG. 2. The g.sub.m of this transconductance amplifier may again be expressed as in (1), but, since the bias current IEE is now approximately the sum of the injected current and the DC emitter current through each of Q3 and Q4, the multiplier current I1 is now given approximately by EQU I.sub.1 =I.sub.EE -I.sub.NJ ( 2)
FIG. 3 shows a more complete version of the transconductance amplifier of FIG. 1. Included in FIG. 3 are:
cascode devices Q7 and Q8 to provide a higher output resistance; PA1 high output resistance load devices ILOAD and ILOAD*; and PA1 emitter follower stages Q9, IEE9 and Q10, IEE10 necessary to shift the DC output voltage down to a level appropriate for the input of an identical cascaded transconductance amplifier. PA1 Cox=gate oxide capacitance per unit area PA1 W/L=ratio of width to length of the channel region of the MOSFET devices PA1 V.sub.GS =gate-source voltage of the MOSFET devices PA1 V.sub.T =threshold voltage of the MOSFET devices PA1 V.sub.DS =drain-source voltage of the MOSFET devices
The emitter follower stage has several undesirable effects. For one, the input resistance of the emitter follower is in parallel with the transconductance amplifier output resistance; hence, it effectively reduces the output resistance of the transconductance amplifier. Also, in a cascaded transconductance amplifier structure, the emitter follower introduces an additional delay in the signal path; i.e., it leads to an additional high-frequency parasitic pole. Other obvious disadvantages include the increased power dissipation and circuit area required by the emitter followers.
FIG. 4 shows a prior art BiMOS transconductance amplifier in which the input devices are MOSFETs biased in the triode (linear) region of operation. Unlike the prior art transconductance amplifier of FIG. 3, the transconductance amplifier of FIG. 4 can easily be designed such that DC level shifting from the output of one amplifier to the input of an identical cascaded amplifier is not required; hence, the complexities of an additional level shifting stage may be avoided. An additional advantage of the transconductance amplifier of FIG. 4 is that the MOSFET devices provide a much higher input resistance than would a BJT input device; thus, cascading of the MOSFET structures will be much less detrimental to the transconductance amplifier's output resistance.
One possible disadvantage of the transconductance amplifier of FIG. 4 is that its range of g.sub.m adjustment (via VDS adjustment) may be somewhat more limited than the multiplier-based BJT transconductance amplifier of FIG. 3; a g.sub.m adjustment by a factor of 4 has been reported for the circuit of FIG. 4, while a factor greater than 10 has been reported for the circuit of FIG. 3. It should also be noted that a significant portion of the adjustment range obtained for the amplifier of FIG. 4 will likely be necessary solely to overcome process-dependent parameter variations in the MOSFET devices.
What is needed is a transconductance amplifier which provides a high input resistance, high output resistance, and wide g.sub.m adjustment range without need for output level-shifting stages.
In addition to a specific transconductance amplifier circuit implementation, the use of transconductance amplifiers as system building blocks usually requires some means of control of the transconductance parameter of these amplifiers in order that system specifications remain within given tolerances over a wide range of temperature, processing and other variations. One approach to the problem is to design some sort of feedback circuit which monitors the output of a secondary system (whose specifications are closely matched to the specifications of the primary system) and adjusts the individual g.sub.m 's such that the error between the secondary system output and the desired secondary system output remains small. An example of this approach is the use of phase-locked-loops and master-slave configurations in g.sub.m -C filters.
An alternative approach to the control of transconductor-based systems is to employ transconductors whose g.sub.m variation with temperature is a well known and easily reproduced function; the bias current or voltage which controls the transconductor can then be made to follow a similar function of temperature such that the g.sub.m remains constant over temperature. This approach is sometimes used with BJT-based transconductors where, like a single BJT, the g.sub.m is directly proportional to the quotient of a collector bias current and the absolute temperature; by supplying the transconductor with a bias current which is proportional to absolute temperature, the g.sub.m remains approximately constant. As for variations in system specifications due to processing variations (e.g., variations of capacitance values in g.sub.m -C filters), these may be overcome by a one-time trimming operation as a final fabrication step.
Although the latter approach does thus complicate the fabrication procedure, the savings in circuit area and power dissipation over the former approach can be substantial; in addition, the absence of a secondary system's transient signals may result in an improvement in system performance for the latter approach. The latter approach, however, is poorly suited for use with FET-based transconductors, for which the g.sub.m value is typically a more complex function of temperature and bias current than in the case of the BJT-based transconductor. In practice, even the g.sub.m value of a BJT-based transconductor can exhibit deviations from an ideal proportional relationship between bias current and absolute temperature.
These observations inspire a third approach in which a feedback circuit is used to maintain only the DC g.sub.m value of a reference transconductor, with all transconductors in the primary system being slaved to this reference g.sub.m value. Such control of the DC g.sub.m value of a single transconductor must be expected to be somewhat simpler than the control of the specification(s) of the more complicated secondary systems typically found in master-slave configurations. At the same time, the zero-frequency nature of this third approach will not give rise to transients which may detract from the primary system performance.
FIG. 5 is a circuit diagram of a prior art g.sub.m control circuit. The control circuit includes a control transconductor (formed by devices Min1, Min2, Q1 and Q2) identical in structure to the assumed signal-processing transconductor(s) to be controlled. By forcing both a differential reference voltage input and a differential output reference current on the control transconductor, the goal is to force the g.sub.m of this control transconductor to be ##EQU2##
The differential reference voltage input is forced by the inputs VCM+Vref/2 and VCM-Vref/2, providing a differential input voltage value of Vref. The differential output is forced by the current source Iref/2 forcing a corresponding difference Iref in the currents I01 and I02. Amplifier A2 maintains the voltage of the gates of MOSFETs ML1 and ML2 so that the average of the drain voltages of these MOSFETs is equal to the common mode voltage VCM. Since the gate-source voltages of MOSFETs ML1 and ML2 are equal, the corresponding drain-source currents are approximately equal. Amplifier A1 controls the control voltage V.sub.control to drive the difference in the voltages V01 and V02 to a minimum. This holds the differential current output at Iref for the differential input voltage Vref, forcing g.sub.mcontrol to the value given by equation (3).
Assuming triode-region operation of MOSFETs Min1 and Min2 ##EQU3##
where: .mu.=mobility of the channel region of the MOSFET devices
and assuming transistors Q1 and Q2 operate in their linear region with approximately the same base-emitter voltage drops V.sub.BE1 .apprxeq.V.sub.BE2 .apprxeq.V.sub.BE, it follows that ##EQU4##
From (4), it is clear that V.sub.control may be varied to maintain a constant g.sub.mcontrol in spite of variations in FET and BJT parameters .mu., Cox, W/L and V.sub.BE. Recall that V.sub.control is under the influence of a feedback loop which includes voltage amplifier A1 to keep the difference (V.sub.01 -V.sub.02) small; this translates to keeping approximately the same currents through MOSFETs ML1 and ML2, keeping I.sub.01 .apprxeq.I.sub.02 +I.sub.REF, and keeping ##EQU5## as desired from (3). Application of the voltage V.sub.control to any identical signal-processing transconductors results in the identical g.sub.m value for these elements.
A drawback of the prior art g.sub.m control circuit of FIG. 5 is the need for two differential input voltage amplifiers A1 and A2 with high open-loop gains; such amplifiers can add considerably to the power dissipation and area required by the circuit. What is needed is a g.sub.m control circuit which avoids the complexities of two voltage amplifiers in the feedback loop.